HPC

SoC PLANNER represents a new generation design exploration solution addressing trillion-chip annual manufacturing volumes and accelerating application requirements across automotive, HPC, and AI sectors. This tool tackles the growing complexity of system-on-chip design as schedules compress and design spaces expand exponentially.

Two research institutions in Berlin, Germany are partnering to develop a new HPC data center, initially housed in existing ZIB and HZB buildings with plans for a new facility later. This expansion of high-performance computing infrastructure in Europe supports the region's push for technological sovereignty and research capabilities in AI and scientific computing.